An efficient tree cache coherence protocol for distributed shared memory multiprocessorsYEIMKUAN CHANG; BHUYAN, L. N.IEEE transactions on computers. 1999, Vol 48, Num 3, pp 352-360, issn 0018-9340Article

Availability of CAUTRA, a subset of the French Air traffic control systemKANOUN, K; BORREL, M; MORTEVEILLE, T et al.IEEE transactions on computers. 1999, Vol 48, Num 5, pp 528-535, issn 0018-9340Article

Efficient techniques for dynamic test sequence compactionRUDNICK, E. M; PATEL, J. H.IEEE transactions on computers. 1999, Vol 48, Num 3, pp 323-330, issn 0018-9340Article

Fault tolerance properties of pyramid networksFENG CAO; DU, D.-Z; HSU, D. F et al.IEEE transactions on computers. 1999, Vol 48, Num 1, pp 88-93, issn 0018-9340Article

Improving the availability of mutual exclusion systems on incomplete networksHARADA, T; YAMASHITA, M.IEEE transactions on computers. 1999, Vol 48, Num 7, pp 744-747, issn 0018-9340Article

The broadcast comparison model for on-line fault diagnosis in multicomputer systems : Theory and implementationBLOUGH, D. M; BROWN, H. W.IEEE transactions on computers. 1999, Vol 48, Num 5, pp 470-493, issn 0018-9340Article

Randomized cache placement for eliminating conflictsTOPHAM, N; GONZALEZ, A.IEEE transactions on computers. 1999, Vol 48, Num 2, pp 185-192, issn 0018-9340Article

A quantitative analysis of the performance and scalability of distributed shared memory cache coherence protocolsHEINRICH, M; SOUNDARARAJAN, V; HENNESSY, J et al.IEEE transactions on computers. 1999, Vol 48, Num 2, pp 205-217, issn 0018-9340Article

A learning multiple-valued logic network : Algebra, algorithm, and applicationsZHENG TANG; CAO, Q.-P; ISHIZUKA, O et al.IEEE transactions on computers. 1998, Vol 47, Num 2, pp 247-251, issn 0018-9340Article

A parallel algorithm for state assignment of finite state machinesHASTEER, G; BANERJEE, P.IEEE transactions on computers. 1998, Vol 47, Num 2, pp 242-246, issn 0018-9340Article

An efficient solution to the cache thrashing problem caused by true data sharingJIN, G; LI, Z; CHEN, F et al.IEEE transactions on computers. 1998, Vol 47, Num 5, pp 527-543, issn 0018-9340Article

Computation of √x/d in a very high radix combined division/square-root unit with scaling and selection by roundingANTELO, E; LANG, T; BRUGUERA, J. D et al.IEEE transactions on computers. 1998, Vol 47, Num 2, pp 152-161, issn 0018-9340Article

Deriving logic systems for path delay test generationBOSE, S; AGRAWAL, P; AGRAWAL, V. D et al.IEEE transactions on computers. 1998, Vol 47, Num 8, pp 829-846, issn 0018-9340Article

Design of balanced and constant weight codes for VLSI systemsTALLINI, L. G; BOSE, B.IEEE transactions on computers. 1998, Vol 47, Num 5, pp 556-572, issn 0018-9340Article

High performance fault-tolerant digital neural networksBETTOLA, S; PIURI, V.IEEE transactions on computers. 1998, Vol 47, Num 3, pp 357-363, issn 0018-9340Article

Low complexity bit-parallel multipliers for a class of finite fieldsHUAPENG WU; HASAN, M. A.IEEE transactions on computers. 1998, Vol 47, Num 8, pp 883-887, issn 0018-9340Article

Modulo scheduling with reduced register pressureLLOSA, J; VALERO, M; AYGUADE, E et al.IEEE transactions on computers. 1998, Vol 47, Num 6, pp 625-638, issn 0018-9340Article

The InfoPad multimedia terminal : A portable device for wireless information accessTRUMAN, T. E; PERING, T; DOERING, R et al.IEEE transactions on computers. 1998, Vol 47, Num 10, pp 1073-1087, issn 0018-9340Article

Asynchronous parallel prefix computationMANOHAR, R; TIERNO, J. A.IEEE transactions on computers. 1998, Vol 47, Num 11, pp 1244-1252, issn 0018-9340Article

Index mapping approach of deriving the PM DFT algorithmsSUNDARARAJAN, D; OMAIR AHMAD, M.IEEE transactions on computers. 1998, Vol 47, Num 12, pp 1418-1424, issn 0018-9340Article

MPS : Miss-path scheduling for multiple-issue processorsBANERJIA, S; SATHAYE, S. W; MENEZES, K. N et al.IEEE transactions on computers. 1998, Vol 47, Num 12, pp 1382-1397, issn 0018-9340Article

New low-complexity bit-parallel finite field multipliers using weakly dual basesHUAPENG WU; ANWARUL HASAN, M; BLAKE, I. F et al.IEEE transactions on computers. 1998, Vol 47, Num 11, pp 1223-1234, issn 0018-9340Article

Abstraction techniques for validation coverage analysis and test generationMOUNDANOS, D; ABRAHAM, J. A; HOSKOTE, Y. V et al.IEEE transactions on computers. 1998, Vol 47, Num 1, pp 2-14, issn 0018-9340Article

Design verification of the S3.mp cache-coherent shared-memory systemFONG PONG; BROWNE, M; AYBAY, G et al.IEEE transactions on computers. 1998, Vol 47, Num 1, pp 135-140, issn 0018-9340Article

A prioritized Petri Net model and its application in Distributed multimedia systemsGUAN, S.-U; YU, H.-Y; YANG, J.-S et al.IEEE transactions on computers. 1998, Vol 47, Num 4, pp 477-481, issn 0018-9340Conference Paper